industrial temperature range idt74lvc16827a 3.3v cmos 20-bit buffer with 5v tolerant i/o 1 january 2004 industrial temperature range the idt logo is a registered trademark of integrated device technology, inc. ? 2004 integrated device technology, inc. dsc-4489/2 features: ? typical t sk(o) (output skew) < 250ps ? esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ?v cc = 3.3v 0.3v, normal range ?v cc = 2.7v to 3.6v, extended range ? cmos power levels (0.4 w typ. static) ? all inputs, outputs, and i/o are 5v tolerant ? supports hot insertion ? available in ssop and tssop packages functional block diagram applications: ? 5v and 3.3v mixed voltage systems ? data communication and telecommunication systems drive features: ? high output drivers: 24ma ? reduced system switching noise idt74lvc16827a description: this 20-bit buffer is built using advanced dual metal cmos technology. the lvc16827a provides high-performance bus interface buffering for wide data/address paths or buses carrying parity. two pairs of nand-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. flow-through organization of signal pins simplifies layout. all inputs are designed with hysteresis for improved noise margin. the lvc16827a buffer is ideally suited for driving high capacitance loads and low impedance backplanes. all pins can be driven from either 3.3v or 5v devices. this feature allows the use of the device as a translator in a mixed 3.3v/5v supply system. the lvc16827a has been designed with a 24ma output driver. the driver is capable of driving a moderate to heavy load while maintaining speed performance. 3.3v cmos 20-bit buffer with 5 volt tolerant i/o 1 a 1 1 oe 1 1 y 1 1 oe 2 to nine other channels 2 a 1 2 oe 1 2 y 1 2 oe 2 1 56 55 2 28 29 42 15 to nine other channels
industrial temperature range 2 idt74lvc16827a 3.3v cmos 20-bit buffer with 5v tolerant i/o ssop/ tssop top view pin configuration symbol description max unit v term terminal voltage with respect to gnd ?0.5 to +6.5 v t stg storage temperature ?65 to +150 c i out dc output current ?50 to +50 ma i ik continuous clamp current, ?50 ma i ok v i < 0 or v o < 0 i cc continuous current through each 100 ma i ss v cc or gnd absolute maximum ratings (1) note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. note: 1. as applicable to the device type. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 6.5 8 pf c i/o i/o port capacitance v in = 0v 6.5 8 pf capacitance (t a = +25c, f = 1.0mhz) 1 oe 1 1 y 1 1 y 2 gnd 1 y 3 1 y 4 v cc 1 y 5 1 y 6 gnd 1 y 7 1 y 8 1 y 9 1 y 10 2 y 2 2 y 3 gnd 2 y 4 2 y 5 2 y 6 v cc 2 y 7 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 48 49 50 51 52 53 54 55 56 1 1 oe 2 1 a 1 1 a 2 gnd 1 a 3 1 a 4 v cc 1 a 5 1 a 6 1 a 7 1 a 8 1 a 9 1 a 10 gnd 2 a 2 2 a 3 2 a 4 2 a 5 gnd 2 a 6 2 a 7 2 a 8 gnd 2 y 9 2 y 10 2 oe 1 25 26 27 28 32 31 30 29 gnd 2 a 9 2 a 10 2 oe 2 2 y 1 2 y 8 v cc 2 a 1 pin names description x oe x output enable inputs (active low) x a x data inputs x y x 3-state outputs pin description function table (1) note: 1. h = high voltage level l = low voltage level x = don?t care z = high impedance inputs outputs x oe 1 x oe 2 xax xyx lll l llh h hxx z xhx z
industrial temperature range idt74lvc16827a 3.3v cmos 20-bit buffer with 5v tolerant i/o 3 symbol parameter test conditions min. typ. (1) max. unit v ih input high voltage level v cc = 2.3v to 2.7v 1.7 ? ? v v cc = 2.7v to 3.6v 2 ? ? v il input low voltage level v cc = 2.3v to 2.7v ? ? 0.7 v v cc = 2.7v to 3.6v ? ? 0.8 i ih input leakage current v cc = 3.6v v i = 0 to 5.5v ? ? 5a i il i ozh high impedance output current v cc = 3.6v v o = 0 to 5.5v ? ? 10 a i ozl (3-state output pins) i off input/output power off leakage v cc = 0v, v in or v o 5.5v ? ? 50 a v ik clamp diode voltage v cc = 2.3v, i in = ?18ma ? ?0.7 ?1.2 v v h input hysteresis v cc = 3.3v ? 100 ? mv i ccl quiescent power supply current v cc = 3.6v v in = gnd or v cc ?? 10a i cch i ccz 3.6 v in 5.5v (2) ?? 10 ? i cc quiescent power supply current one input at v cc - 0.6v, other inputs at v cc or gnd ? ? 500 a variation dc electrical characteristics over operating range following conditions apply unless otherwise specified: operating condition: t a = ?40c to +85c notes: 1. typical values are at v cc = 3.3v, +25c ambient. 2. this applies in the disabled state only. note: 1. v ih and v il must be within the min. or max. range shown in the dc electrical characteristics over operating range table for the appropriat e v cc range. t a = ? 40c to + 85c. output drive characteristics symbol parameter test conditions (1) min. max. unit v oh output high voltage v cc = 2.3v to 3.6v i oh = ? 0.1ma v cc ? 0.2 ? v v cc = 2.3v i oh = ? 6ma 2 ? v cc = 2.3v i oh = ? 12ma 1.7 ? v cc = 2.7v 2.2 ? v cc = 3v 2.4 ? v cc = 3v i oh = ? 24ma 2.2 ? v ol output low voltage v cc = 2.3v to 3.6v i ol = 0.1ma ? 0.2 v v cc = 2.3v i ol = 6ma ? 0.4 i ol = 12ma ? 0.7 v cc = 2.7v i ol = 12ma ? 0.4 v cc = 3v i ol = 24ma ? 0.55
industrial temperature range 4 idt74lvc16827a 3.3v cmos 20-bit buffer with 5v tolerant i/o switching characteristics (1) v cc = 2.7v v cc = 3.3v 0.3v symbol parameter min. max. min. max. unit t plh propagation delay 1.5 4.7 1.5 4.1 ns t phl xax to xyx t pzh output enable time 1.5 6.5 1.5 5.8 ns t pzl x oe x to xyx t phz output disable time 1.5 6.4 1.5 5.7 ns t plz x oe x to xyx t sk (o) output skew (2) ? ? ? 500 ps notes: 1. see test circuits and waveforms. t a = ? 40c to + 85c. 2. skew between any two outputs of the same package and switching in the same direction. operating characteristics, v cc = 3.3v 0.3v, t a = 25c symbol parameter test conditions typical unit c pd power dissipation capacitance per buffer/driver outputs enabled c l = 0pf, f = 10mhz pf c pd power dissipation capacitance per buffer/driver outputs disabled
industrial temperature range idt74lvc16827a 3.3v cmos 20-bit buffer with 5v tolerant i/o 5 open v load gnd v cc pulse generator d.u.t. 500 ? 500 ? c l r t v in v out (1, 2) lvc link input v ih 0v v oh v ol t plh1 t sk (x) output 1 output 2 t phl1 t sk (x) t plh2 t phl2 v t v t v oh v t v ol t sk (x) = t plh2 - t plh1 or t phl2 - t phl1 lvc link same phase input transition opposite phase input transition 0v 0v v oh v ol t plh t phl t phl t plh output v ih v t v t v ih v t lvc link data input 0v 0v 0v 0v t rem timing input asynchronous control synchronous control t su t h t su t h v ih v t v ih v t v ih v t v ih v t lvc link low-high-low pulse high-low-high pulse v t t w v t lvc link control input t plz 0v output normally low t pzh 0v switch closed output normally high enable disable switch open t phz 0v v ol+ v lz v oh v t v t t pzl v load/2 v load/2 v ih v t v ol v oh- v hz lvc link test circuits and waveforms propagation delay test circuit for all outputs enable and disable times set-up, hold, and release times notes: 1. for t sk (o) output1 and output2 are any two outputs. 2. for t sk (b) output1 and output2 are in the same bank. definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. pulse generator for all pulses: rate 10mhz; t f 2.5ns; t r 2.5ns. 2. pulse generator for all pulses: rate 10mhz; t f 2ns; t r 2ns. output skew - t sk ( x ) pulse width note: 1. diagram shown for input control enable-low and input control disable-high. symbol v cc (1) = 3.3v0.3v v cc (1) = 2.7v v cc (2) = 2.5v0.2v unit v load 6 6 2 x vcc v v ih 2.7 2.7 vcc v v t 1.5 1.5 vcc / 2 v v lz 300 300 150 mv v hz 300 300 150 mv c l 50 50 30 pf test conditions switch position test switch open drain disable low v load enable low disable high gnd enable high all other tests open
industrial temperature range 6 idt74lvc16827a 3.3v cmos 20-bit buffer with 5v tolerant i/o ordering information corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com idt xx lvc xxxx xx package device type temp. range pv pa 16 74 shrink small outline package thin shrink small outline package 20-bit buffer -40c to +85c xxx family bus-hold 827a no bus-hold double-density, 24ma blank
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